Can’t Find Script Engine “VBScript” 4/04/2014

To keep an eye on Windows Script Host, some Anti-Virus software will play tricks in Windows Registry by replacing the default vbscript.dll with their own hooks. And these hooks might become the source of trouble.

One thing puzzles me lately is that I start to see the message  Can’t Find Script Engine “VBScript” quite often. And my PC is running Windows 7 64 bit. After some googling, I found a solution as in Ref [1]. However, the job is only half done. Although I can now run the VB Script in Windows Command Prompt, the same script will fail if I run it in Visual Studio Express as Build Script.

And after some head scratching, I found that there is another Registry Entry for VBScript Engine on 64 bit Windows 7, which is


And it should be modified to "C:\Windows\SysWOW64\vbscript.dll". Please see Ref[1] for more detail on how to bypass the secure protection when modifying the Registry key.

References :
[1] How To Fix The Error: Can’t Find Script Engine “VBScript” For Script

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    Posted by HAx4 at 3:15 AM 0 Comments  

 Lab Notes - Lmutil Kill License 3/06/2014

Every engineer needs to make a living, so is every software engineer. And license is an important piece of that big pie. Often times, FLEXlm is used to manage the license.

Occasionally, the license hangs due to crash on the client side. And here is how to kill a zombie license:

Use lmutil stat -a 

to find out that hanging license, which includes:

port_number on the license server

And use the following to remove the hanging license:

lmutil lmremove -c port_num@server_name license_name user_name user_computer display

*) Sometimes "display" is the same as user_computer, sometimes it is just a number. (probably with an underscore in the middle)

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    Posted by HAx4 at 10:39 PM 0 Comments  

 Quote from House of Cards 2/24/2014

Opening Scene:

There are two kinds of pain. The sort of pain that makes you strong, or useless pain... the sort of pain that is only suffering. I have no patience for useless things. Moments like this require someone who can act, or do the unpleasant things, or the necessary thing.

PS: You can use http://cn-proxy.com to get a Chinese IP address. Don't ask me why I need a Chinese IP address. :-)


    Posted by HAx4 at 12:31 AM 0 Comments  

 Lab Notes - FPGA Sample Dump 2/08/2014

Adopting FPGA for digital signal processing is a hard job. Often times the implementation behaves far differently than the Matlab simulation. And being able to dump samples in large buffer is vital under such unfortunate circumstance. For Altera FPGA, there are mainly 3 ways to dump samples in large quantity:

(1)    Using sigtap. To save buffer space, storage qualifier or segmented buffer should be used if necessary.  The downside of sigtap is that its maximum depth is always 128K in spite of buffer width, so some extra shift register or script post-processing is needed to accommodate large sample buffers.

(2)    Using In System Memory Editor and In System Probe and Source. Tcl script can be used with quartus_stp. The help under quartus_sh –qhelp does provide nice examples and templates for script to work. A sample Tcl script might be something like the following:

# hardware and device detection
puts "Programming Hardware:"
foreach hardware_name [get_hardware_names] {
                puts $hardware_name
                if { [string match "USB-Blaster*" $hardware_name] } {
                                set usbblaster_name $hardware_name
puts "\nSelect JTAG chain connected to $usbblaster_name.\n";

puts "\nDevices on the JTAG chain:"
foreach device_name [get_device_names -hardware_name $usbblaster_name] {
                puts $device_name
                if { [string match "@1*" $device_name] } {
                                set test_device $device_name
puts "\nSelect device: $test_device.\n";

set probe_instance_info [get_insystem_source_probe_instance_info -hardware_name $usbblaster_name -device_name $test_device]

puts "Select Probe $probe_instance_info"

puts [get_editable_mem_instances -hardware_name $usbblaster_name -device_name $test_device]


start_insystem_source_probe -hardware_name $usbblaster_name -device_name $test_device
begin_memory_edit -hardware_name $usbblaster_name -device_name $test_device

save_content_from_memory_to_file -instance_index 0 ….


##… script post processing for exported files

(3)    Hardware in the loop, with Matlab. The matlab will use the systemconsole object to talk to the FPGA and get sample dumps through system console.

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    Posted by HAx4 at 12:10 AM 0 Comments  

 Spectrum Analyzer : Power Measurement 8/02/2013

In Spectrum Analyzer, the measurement of power can be done by using MEAS/Channel Power. However, for CW, the measurement is different from that of band power, as indicated in Ref[1].

Also, the detect type matters. For CW, Pos Peak, or sample might be suitable. For band power, Log Average can be set. So when you read power number from the marker, make sure you set the proper detect type.

[1] Spectrum Analyzer CW Power Measurements and the Effects of Noise, December 2012 edition of NCSLI Measure: The Journal of Measurement Science

    Posted by HAx4 at 3:28 AM 0 Comments  

 Give you 100 million 5/29/2013

Spend it wisely!

    Posted by HAx4 at 2:19 AM 0 Comments  

 Lab Notes - Altera LVDS Transmitter / Receiver 5/11/2013

If your FPGA device does not have hardcore SERDES, or if all you need is just a no-nonsense differential transceiver that could transfer data from one FPGA to another through a bunch of differential pairs, you might consider using the Megafunction in Ref[1].

To do that

(1)    Make sure TX and RX FPGAs work from the same oscillator.

(2)    Enable fast input/output registers

(3)    Enable differential termination

(4)    It is better to enable DPA at the receiver side, and wait until all the channels are locked on DPA

(5)    After DPA is locked, the word boundary should be aligned. i.e, the bit-slip should be handled for each channel individually by toggling the  rx_channel_data_align pin

(6)   To handle bit-slip, the TX should be composed of into two states: alignment and normal. In alignment state, the TX should keep sending out a sync word, such as 0x5C until it gets an indication from RX that all channels are aligned. Such indication can be realized by using a GPIO from RX back to TX

(7)    The receiver should keep doing the word-boundary-alignment until
        (A)    all channels are receiving the sync word correctly
        (B)    The sync word has been successfully received on all channels for a continuous number of cycles (set a threshold for this)

(8)    After the alignment is finished, the receiver should notify the TX through something like a GPIO so that the TX can start its normal transmission.

(9)    For megafunction setting, both TX and RX can be set with 180 degree phase offset between data and clock

(10)     At the receiver side, the data is received on the clock out of LVDS_RX megafunction. You can use a FIFO to transfer the data to another clock domain. And start reading the data from FIFO when the FIFO is half full

[1] LVDS SERDES Transmitter / Receiver (ALTLVDS_TX and ALTLVDS_RX) Megafunction User Guide Ver 12.0, Altera Corp, Oct 2012

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    Posted by HAx4 at 1:44 AM 0 Comments  




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